This invention relates to a Schottky barrier field effect transistor and, more particularly, to a high-frequency large-output Schottky barrier field effect transistor.
Gallium arsenide, i.e., GaAs has a large electron mobility, which is five to six times larger than the electron mobility of silicon. The peak value of the saturated drift velocity in gallium arsenide is twice that of silicon. Another attractive feature is that gallium arsenide acts as a semi-insulating substrate. These features are put to practical use in the field of semiconductor device manufacturing. The conventional field effect transistor is fabricated on a silicon substrate which hardly responds to a microwave band signal. However, the gallium arsenide Schottky barrier field effect transistor is highly responsive to the microwave signal, and is employed in microwave electronic devices. In fact, the gallium arsenide Schottky barrier field effect transistor tends to supersede the electron tubes. The demand for a high-frequency large-output Schottky barrier field effect transistor is getting larger.
A typical example of the gallium arsenide Schottky barrier field effect transistor is one fabricated on a semi-insulating gallium arsenide substrate, and then the semi-insulating gallium arsenide substrate is overlaid by a thin gallium arsenide channel layer. A source electrode and a drain electrode are held in ohmic contact with the thin gallium arsenide channel layer. A gate electrode is formed on the thin gallium arsenide channel layer between the source electrode and the drain electrode. The gate electrode and the thin channel layer form a Schottky barrier. A depletion layer extends from the Schottky barrier into the thin gallium arsenide channel layer.
A problem inherent in the prior art gallium arsenide Schottky barrier field effect transistor is destruction due to a reverse bias voltage applied between the gate electrode and the drain electrode. When the reverse voltage is applied between the gate electrode and the drain electrode, the electric field is concentrated around the edge of the gate electrode on the drain side, and destruction takes place. In order to prevent the gallium arsenide Schottky barrier field effect transistor from destruction, a field plate is formed in the gate electrode, and dielectric layers of silicon dioxide are provided beneath the side portions of the gate electrode as disclosed in Japanese Patent Application laid-open Nos. 63-87773 and 2000-100831.
FIG. 1 shows a cross section of the prior art gallium arsenide Schottky barrier field effect transistor as disclosed in Japanese Patent Application laid-open No. 2000-100831. The prior art Schottky barrier field effect transistor is fabricated on a gallium arsenide semi-insulating substrate 61. The gallium arsenide semi-insulating substrate 61 is overlaid by a channel layer 62. Contact layers 63 are formed on the upper surface of the channel layer 62, and are spaced from each other so that a part of the channel layer 62 is exposed to the recess between the contact layers 63. A source electrode 67 and a drain electrode 68 are respectively formed on the contact layers 63, and are held in ohmic contact. The contact layers 63 and the exposed surface of the channel layer 62 are covered with a dielectric layer 64, and a gate electrode 65 is held in contact with the channel layer 62 through a contact hole formed in the dielectric layer 64. The gate electrode 65 has a field plate 69. The field plate 69 projects from the remaining portion of the gate electrode 65 toward the drain electrode 68, and is separated from the channel layer 62 by the dielectric layer 64.
The prior art teaches that the dielectric layer 64 is improved in withstanding voltage when the following conditional expressions are satisfied.
1 less than ∈ less than 5xe2x80x83xe2x80x83(1)
25 less than t/∈ less than 70xe2x80x83xe2x80x83(2)
where ∈ is dielectric constant of the dielectric layer 64 and t is the thickness of the dielectric layer 64.
The dielectric layer 64 is assumed to be formed of SiO2. The dielectric constant of silicon dioxide is of the order of 3.9. Therefore, the preferable thickness t is calculated from the conditional expressions (1) and (2), and falls within the range of greater than 97.5 nanometers and less than 273 nanometers, i.e., 97.5 nm less than t less than 273 nm.
The prior art Schottky barrier field effect transistor reference teaches that the dielectric layer 64 should be 200 nm thick in order to exhibit good withstanding voltage characteristics. However, the prior art documents are silent to the contour of the field plate.
Using a microwave wide band amplifier, the present inventors measured the return-loss representative of the reduction in the gain of the amplifier. The microwave wide band amplifier formed a part of a communication system, and included two Schottky barrier field effect transistors of different thickness in the dielectric layer. The return loss was measured at 800 MHz. In case where the dielectric layer was 200 nanometers thick, the return-loss was xe2x88x9215 dB. On the other hand, when the dielectric layer was 400 nanometers thick, the return-loss was xe2x88x9218 dB.
The field plate 69, the channel layer 62 and the dielectric layer 64 in combination form a capacitor. The parasitic capacitance is inversely proportional to the thickness of the dielectric layer 64. When the parasitic capacitance is increased, the gain is decreased due to the Miller effect. On the other hand, if the dielectric layer is decreased to a certain thickness greater than 200 nanometers, the suppression of the electric field concentration is weakened, and, accordingly, the withstanding voltage becomes lower. Furthermore, the suppression of the electric field concentration results in strong distortion under the reception of excessively large input power. Namely, when the radio-frequency input signal has an excessively large power, the electric charge is accumulated at the boundary between the channel layer and the dielectric layer on the drain side, and causes the output signal to have large distortion. When the prior art Schottky barrier field effect transistor is incorporated in a wide-amplitude high-power electric circuit, this problem is serious.
Therefore an important object of the present invention is to provide a Schottky barrier field effect transistor, which is small in return-loss and distortion, and high in withstanding voltage.
In accordance with the above conditions, the present invention, provides a Schottky barrier field effect transistor fabricated on a substrate comprising a channel layer formed of a first compound semiconductor, a source structure connected to a first portion of the channel layer, a drain structure connected to a second portion of the channel layer and spaced from the source structure to form a recess, a dielectric layer covering the channel layer, a part of the source structure and a part of the drain structure and having a contact hole between the source structure and the drain structure and a gate electrode having a Schottky contact portion held in contact with the channel layer through the contact hole and a field plate extending from the Schottky contact portion toward the drain structure on the dielectric, silicon dioxide, layer, and a thickness of the dielectric layer between the channel layer and the field plate equal to or greater than 300 nanometers.